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IObundle demonstrates Edge-AI IP. Porto, 11/27-28/2025: At the 3rd and final General Assembly of the A-IQ-Ready Chips JU project, we demonstrated our RISC-V + CGRA edge AI prototype running on an FPGA. The demo showcased the integration of a RISC-V processor with a coarse-grained reconfigurable accelerator, targeting efficient on-device AI inference for edge applications.
This milestone marks an important step in validating the project’s architecture and design flow, highlighting both performance and flexibility when deploying AI workloads on heterogeneous, open architectures—a big thanks to all project partners for the collaboration throughout the project.
IObundle explains its proprietary Edge-AI flow. Porto, 11/27–28/2025: At the 3rd and final General Assembly of the A-IQ-Ready Chips JU project, we demonstrated our RISC-V + CGRA edge AI design flow. The flow automatically generates RISC-V software, along with a custom CGRA accelerator, tightly controlled by the software, enabling efficient hardware/software co-design for edge AI workloads.
The demonstration highlighted how the flow simplifies the development of heterogeneous systems by bridging software generation and accelerator specialization, while preserving flexibility and programmability. This represents a key outcome of the project, showcasing a practical path toward open, energy-efficient, and scalable AI solutions for the edge.
IObundle chats with Brazilian students. Lisbon, 10/19/2025: José, IObundle’s founder (second from left), had the pleasure of hosting a group of talented Brazilian students supported by the Brazilian Government’s CI Program. During the visit, he shared insights into IObundle’s work in semiconductors and discussed opportunities to strengthen collaboration between academia, industry, and international talent.
The exchange sparked engaging discussions and highlighted the importance of global cooperation in shaping the future of technology. Prof. Guilherme Paim, who accompanied the students, is pictured on the right. Inspiring to see the next generation of engineers so motivated and curious about semiconductor innovation.
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